1. Field of the Invention
The present invention relates to a frequency synthesizer and, more particularly, to a high speed switching technique for switching transmitting/receiving channels in a mobile radio communication system.
2. Description of the Related Art
It has been anticipated that current analog mobile telephone systems will reach capacity in the near future because the recent, substantial increase in the number of mobile telephone subscribers. Therefore, digital mobile telephone systems are being introduced. Such digital systems require terminals capable of switching channels at high speed.
To realize high speed switching, a phase locked loop (PLL) frequency synthesizer controlling one or both of input frequencies to a phase detector may be used. Such a PLL frequency synthesizer is described, for example, in Japanese Laid-Open Patent Publication No. 151824/1989 (JP-A-01-151824) or Japanese laid-Open Patent Publication No. 54917/1991 (JP-A-03-54917). In such PLL frequency synthesizers, the switching time from one channel to a channel adjacent thereto requires a time period of as short as 100 .mu.s. However, when it is necessary to switch from a channel of one extreme frequency of a band to a channel of the other extreme frequency, it takes a time which is 10 to 20 times greater. This is caused by "take-in time", which is indispensable for PLL operation.